Synthesizers are used to generate signals of a given frequency. This frequency signal is often mixed with the received signal to convert the received signal to an intermediate frequency or mixed with the signal to be transmitted to convert that signal to an intermediate frequency, in wireless telecommunication applications. However, it should be appreciated that synthesizers are not limited to application in the telecommunication field.
Reference is made to FIG. 1, which shows one example of part of a known phase locked loop type of synthesizer containing an aided acquisition circuit. The synthesizer receives a reference signal fref. The reference signal fref is input to a phase detector 101. The phase detector 101 compares the reference frequency fref with a feedback value ffeedback. The phase detector 101 generates an error signal based on the results of this comparison. The output of the phase detector 101 is connected to a charge pump 100. In addition, the phase detector is connected to an out-of-lock circuit 99, which detects or is instructed to pass this error signal, to an additional charge pump 104, whose output is input to a filter 103. The filter 103 comprises a resistor 108 arranged in series with a capacitor 112 between the output of the phase detector and ground. The filter also has a second capacitor 110 which is arranged in parallel to the resistor 108 and capacitor 112 combination. The auxiliary charge pump 104 is connected to a node between the first capacitor 112 and the resistor 108. The filter 103 is connected between the output of the phase detector 101 and the input to a voltage controlled oscillator 102. The desired frequency fo is output by the voltage controlled oscillator. This frequency is also fed back via a divider 107, the output of which provides ffeedback.
The filter 103 removes higher order frequencies and in arrangements such as shown in FIG. 1 provides a conversion gain. It should be appreciated that the output frequency provided by the voltage controlled oscillator 102 is determined by the combination of the voltage and the closed loop error signal necessary to maintain phase lock, applied to its input.
When the phase has been acquired and the loop is locked, a switch 106 of the out of lock circuit 99 is open. However, when the phase is being acquired, the switch 106 is closed. This allows the auxiliary charge pump to ensure that the capacitors 110 and 112 have the required amount of charge on them for the required phase.
Arrangements such as shown in FIG. 1 attempt to reduce the phase lock times by speeding up the rate of change of charge held on capacitor 112 during the reacquisition period. This helps maintain the in-band phase noise by maintaining the same locked loop bandwidth. During the acquisition period a larger loop bandwidth is temporarily created to speed up the locking process. Normally increasing the loop bandwidth increases the overall noise content of the synthesizer as the original noise present inside the loop band width is amplified up to the new loop bandwidth. By temporarily using larger loop bandwidths during the acquisition period, it is possible to establish the conditions necessary for faster lock times.
However, state-of-the-art single loop synthesizers are not able to simultaneously meet the specifications of lock time and phase noise required by modern mobile communications systems without assistance. In the arrangement shown in FIG. 1, some additional assistance is provided by the auxiliary charge pump, but these synthesizers still remain inadequate to simultaneously meet the synthesizer lock time and phase noise specifications. This is because of the noise floor limitation of the phase detector. In most modern phase lock loop applications the noise attributed to the sampling action of wide band noise, taking place at the phase frequency detector input, prevails which is amplified up to the loop's operating bandwidth. Usually, the reference signal noise is below that of the sampled noise.
The auxiliary charge pump in the arrangement shown in FIG. 1 complements the charge pump circuit by boosting the rate of change of charge in the loop filter capacitors only when required, leaving the task of maintaining phase lock to the main charge pump. The auxiliary charge pump system must possess hysteresis in order to provide a seamless handover for phase acquisition and must remain unconditionally stable at all times with a minimum of change in loop dynamics during operation and handover. The auxiliary charge pump is arranged to alter the charge in the loop filter capacitors by providing the DC voltage offset necessary to maintain frequency lock which is then adjusted to maintain phase lock at every sampling instance of the digital phase locked loop.
However, this is disadvantageous because during the hand-back process to normal phase lock, the charge differences between loop filter capacitors results in a phase disturbance of the loop. This parasitic phase disturbance then needs to be compensated for with the normal operating loop bandwidth. This leads to an extended lock time period. Furthermore, the type and quality of the capacitors used in a loop filter can be a limiting factor particularly for lower loop bandwidths. This is particularly true for physically small components, which cannot be fabricated using low loss dielectrics such as C0G or NP0. This may lead to a “dielectric absorption/relaxation” effect, which considerably extends the lock time. The dielectric absorption/relaxation effect is used to describe the apparent memory that poorer quality dielectric capacitors appear to exhibit. This apparent memory effect prohibits these components from being used in any applications where a fast change in capacitor charge is required. Clearly, if the charge on the capacitor cannot be changed rapidly, then the time required to attain phase lock will be increased.
In summary, the problem with known synthesizers is that they all rely on forcing the charge onto the loop filter capacitors to reach their new target level as quickly as possible. This new level of charge in each of the loop filter capacitors combine to give a voltage output which is applied to the voltage controlled oscillator necessary for it to give out the required frequency within the limits of the loop bandwidth. Once this correct voltage level has been reached, the charge forcing circuit (i.e. the auxiliary charge pump) is usually removed or minimised by the action of the switch. This allows the normal action of the phase lock looped dose loop response to acquire and maintain phase lock by applying small correction signals. However, these charge forcing circuits introduce a phase perturbation during the handover process between charge force action to normal phase lock period. Clearly this is undesirable.